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      1. 專注電子技術學習與研究
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        MSP430F5438 Unified System Clock

        作者:工人丁   來源:工人丁   點擊數:  更新時間:2014年05月30日   【字體:

         #include "msp430x54x.h"

        void UCS_Init(void)
        { P5SEL |= 0x0C; // Port select XT2
        UCSCTL6 &= ~ XT2OFF; // Set XT2 On
        P7SEL |= 0x03; // 端口選擇外部低頻晶振XT1
        UCSCTL6 &=~XT1OFF; // 使能外部晶振
        UCSCTL6 |= XCAP_3; // 設置內部負載電容
        UCSCTL3 |= SELREF_2; // DCOref = REFO
        UCSCTL4 |= SELA_0; // ACLK = XT1
        __bis_SR_register(SCG0); // 關閉FLL控制回路
        UCSCTL0 =DCO0 + DCO1 + DCO2 + DCO3 + DCO4; // 設置DCOx, MODx
        UCSCTL1 = DCORSEL_5; // 設置DCO振蕩范圍
        UCSCTL2 = FLLD__1 + 0X2A7; // Fdco = ( FLL_FACTOR + 1)×FLLRef = (649 + 1) * 32768 = 21.2992MHz
        __bic_SR_register(SCG0); // 打開FLL控制回路
        __delay_cycles(1024000);
        do
        {
        UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); // 清除 XT2,XT1,DCO 錯誤標志
        SFRIFG1 &= ~OFIFG;
        }while(SFRIFG1&OFIFG); // 檢測振蕩器錯誤標志
        UCSCTL4 |= SELS__XT2CLK + SELM__XT2CLK + SELA__DCOCLKDIV ; // MCLK=SMCLK=晶振12Mhz DCO=21.2922Mhz
        UCSCTL5 |= DIVS__1; // ACLK=32.768 ,SMCLK=XT2/1,MCLK=XT2
        }


        void main(void)
        {unsigned char a,b,c;
        WDTCTL = WDTPW + WDTHOLD; // Stop WDT
        UCS_Init();
        P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD
        UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
        UCA0CTL1 |= UCSSEL__ACLK; // SMCLK
        UCA0BR0 = 184; // 12MHz 115200 (see User's Guide)
        UCA0BR1 = 0; // 12MHz 115200
        UCA0MCTL |= UCBRS_1 + UCBRF_0; // Modulation UCBRSx=1, UCBRFx=0
        UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
        UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
        P1DIR=0xff;
        P1OUT=0x55;
        __bis_SR_register(GIE);
        //__bis_SR_register(LPM3); // Enter LPM0, interrupts enabled
        //__no_operation(); // For debugger
        while(1)
        {for(a=0;a<250;a++)
        for(b=0;b<25;b++)
        for(c=0;c<5;c++)
        {;}
        P1OUT=~P1OUT;
        // UCA0TXBUF=P1OUT;

        }
        }

        // Echo back RXed character, confirm TX buffer is ready first
        #pragma vector=USCI_A0_VECTOR
        __interrupt void USCI_A0_ISR(void)
        {
        switch(__even_in_range(UCA0IV,4))
        {
        case 0:break; // Vector 0 - no interrupt
        case 2: // Vector 2 - RXIFG
        while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
        UCA0TXBUF = UCA0RXBUF; // TX -> RXed character
        break;
        case 4:break; // Vector 4 - TXIFG
        default: break;
        }
        }

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